MODBUS Register Map of IRD8800 Speed Module M88900
Below is the MODBUS Register Map of IRD8800 Speed module M88900
| Register | Datatype | Function | Description |
| Channel 1 |
| 1 | Long Inverse | R/W | TR Set |
| 2 |
| 3 | Int | R/W | Hystersis |
| 4 | Int | R/W | Logic |
| 5 | Int | R/W | Latch |
| 6 | Int | R/W | Delay |
| 7 | Long Inverse | R/W | Alarm Set |
| 8 |
| 9 | Int | R/W | Hystersis |
| 10 | Int | R/W | Logic |
| 11 | Int | R/W | Latch |
| 12 | Int | R/W | Delay |
| 13 | Long Inverse | R/W | Range Hi |
| 14 |
| 15 | Int | R/W | Teeth |
| 16 | Int | R/W | Gap Lo |
| 17 | Int | R/W | Gap Hi |
| 18 | Int | R/W | Start timer status |
| 19 | Int | R/W | Start time |
| 20 | Int | R/W | curr adjustment |
| Channel 2 |
| 21 | Long Inverse | R/W | TR Set |
| 22 |
| 23 | Int | R/W | Hystersis |
| 24 | Int | R/W | Logic |
| 25 | Int | R/W | Latch |
| 26 | Int | R/W | Delay |
| 27 | Long Inverse | R/W | Alarm Set |
| 28 |
| 29 | Int | R/W | Hystersis |
| 30 | Int | R/W | Logic |
| 31 | Int | R/W | Latch |
| 32 | Int | R/W | Delay |
| 33 | Long Inverse | R/W | Range Hi |
| 34 |
| 35 | Int | R/W | Teeth |
| 36 | Int | R/W | Gap Lo |
| 37 | Int | R/W | Gap Hi |
| 38 | Int | R/W | Start timer status |
| 39 | Int | R/W | Start time |
| 40 | Int | R/W | curr adjustment |
| System |
| 41 | Long Inverse | R | Channel 1 PV |
| 42 |
| 43 | Long Inverse | R | Channel 2 PV |
| 44 |
| 45 | Int | R | Channel 1 Tx |
| 46 | Int | R | Channel 2 Tx |
| 47 | Int | R | Relay Flags |
| 48 | Int | R | Status |
| 49 | Int | R | Unit Number |
| 50 | Int | R | No. of Channel |
| 51 | Int | R | Trip Bypass |
| 52 | Int | R | Bargraph |
| 53 | Int | R | Baudrate |
| 54 | Int | R | Parity |
| 55 | Int | R | 900 |
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